{"id":187,"date":"2007-09-06T11:54:09","date_gmt":"2007-09-06T08:54:09","guid":{"rendered":"http:\/\/www.skippari.net\/projects\/2007\/09\/06\/spartan-3e-starter-kit-logic-analyzer.html"},"modified":"2008-12-08T02:28:43","modified_gmt":"2008-12-07T23:28:43","slug":"spartan-3e-starter-kit-logic-analyzer","status":"publish","type":"post","link":"http:\/\/www.skippari.net\/projects\/?p=187","title":{"rendered":"Spartan 3E starter kit logic analyzer"},"content":{"rendered":"

I needed to capture some logic signals for viewing but unfortunately didn’t have a separate logic analyzer available for that. Then I remembered seeing a logic analyzer project for the Xilinx Spartan 3 starter kit<\/a> by Michael Poppitz. Jonas Diemer has also made a port of the project to the Spartan 3E starter kit.<\/p>\n

<\/a><\/p>\n

\"hw-spar3e-sk-us_l.jpg\"<\/a><\/p>\n

There is a very nice Java client software<\/a> that has also been getting some additional features as contributions. Also looks like the VHDL code for the FPGA has been re-structured in the recent versions making porting to different platforms easier.<\/p>\n

<\/a><\/p>\n

\"la_screenshot_main_0_6.png\"<\/a><\/p>\n

Getting it running with my Spartan 3E starter kit<\/a> was pretty simple thanks to the existing port for this board. This port comes only as source so it takes a little additional time to compile it to binaries so I’ll provide the binary files here in case someone wishes to quickly test it on the Spartan 3E starter kit board.<\/p>\n

la-bin-081-s3e.zip<\/a><\/p>\n

You need to install the RXTX<\/a> library if you don’t have it already. rxtx-21-7-bins-r2.zip<\/a><\/p>\n

FPGA bit file was made using ISE 9.2.02i and JAR package compiled using jdk1.6.0_02<\/p>\n

Source package used to compile these binaries la-src-081-test-s3e.zip<\/a>
\nYou should check the project site<\/a> for possible updates.<\/p>\n

Next on the list would be making an input board for wider input voltage range.<\/p>\n","protected":false},"excerpt":{"rendered":"

I needed to capture some logic signals for viewing but unfortunately didn’t have a separate logic analyzer available for that. Then I remembered seeing a logic analyzer project for the Xilinx Spartan 3 starter kit by Michael Poppitz. Jonas Diemer has also made a port of the project to the Spartan 3E starter kit. There […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1],"tags":[],"class_list":["post-187","post","type-post","status-publish","format-standard","hentry","category-uncategorized"],"_links":{"self":[{"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=\/wp\/v2\/posts\/187","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=187"}],"version-history":[{"count":0,"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=\/wp\/v2\/posts\/187\/revisions"}],"wp:attachment":[{"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=187"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=187"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.skippari.net\/projects\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=187"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}